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High Speed Digital Design: Design of High Speed Interconnects and Signaling, by Hanqiao Zhang, Steven Krooswyk, Jeffrey Ou
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High Speed Digital Design discusses the major factors to consider in designing a high speed digital system and how design concepts affect the functionality of the system as a whole. It will help you understand why signals act so differently on a high speed digital system, identify the various problems that may occur in the design, and research solutions to minimize their impact and address their root causes. The authors offer a strong foundation that will help you get high speed digital system designs right the first time.
Taking a systems design approach, High Speed Digital Design offers a progression from fundamental to advanced concepts, starting with transmission line theory, covering core concepts as well as recent developments. It then covers the challenges of signal and power integrity, offers guidelines for channel modeling, and optimizing link circuits. Tying together concepts presented throughout the book, the authors present Intel processors and chipsets as real-world design examples.
- Provides knowledge and guidance in the design of high speed digital circuits
- Explores the latest developments in system design
- Covers everything that encompasses a successful printed circuit board (PCB) product
- Offers insight from Intel insiders about real-world high speed digital design
- Sales Rank: #801953 in Books
- Published on: 2015-09-17
- Released on: 2015-09-03
- Original language: English
- Number of items: 1
- Dimensions: 9.25" h x .61" w x 7.50" l, 1.21 pounds
- Binding: Paperback
- 272 pages
From the Back Cover
While many books cover digital system design, the acknowledged standards are 10 years old or more and do not cover the latest developments. The authors also bring an Intel insider perspective and share Intel’s vision for real-world high-speed digital design. This book discusses the major factors to consider in designing a high speed digital system and how design concepts affect the functionality of the system as a whole. It will help a designer understand why high speed signals act so differently on a high speed digital system, identify the various problems that may occur in the design and research solutions to minimize their impact and address their root causes. The authors offer a strong foundation and empower readers to get high speed digital system designs right the first time.
Taking a systems design approach, High Speed Digital Design offers a progression from fundamental to advanced concepts, starting with transmission line theory, covering core concepts as well as recent developments. It then covers the challenges of signal and power integrity, offers guidelines for channel modeling, and optimizing link circuits. Tying together concepts presented throughout the book, the authors resent Intel processors and chipsets as real-world design examples.
About the Author
Hanqiao Zhang is an Analog Engineer at Intel and holds a PhD degree in Electromagnetics and Microwave Engineering from Clemson University. Hanqiao joined Intel Xeon product electrical validation team in 2011, where he worked on generations of Intel high-speed digital systems. He developed methodologies for validating high-speed interfaces, such as PCI Express and Quick Path Interface (QPI). Hanqiao is now a signal integrity engineer with Intel Data Center Group. He is involved in mission-critical high-performance servers signal integrity design, bring up, validation and debug.
Steve Krooswyk has been at Intel since 2003 when we joined as a signal integrity engineer for EPSD server development. In 2009, Steve transitioned into the signal integrity lead for PCI Express in Intel’s Enterprise Platform Technology Division (EPTD). In addition to server products, his experience includes involvement in the PCI Express 3.0 and 4.0 specifications. He holds a B.S. and M.S. in electrical engineering from the University of South Carolina.
Jeffrey Ou joined Intel in 1999 as an analog design engineer in CMOS RF transceiver design. In 2006, Jeffrey transitioned to Xeon processor product design team in Server Development Group (SDG) developing a serial I/O module configurable for PCI Express and Quick Path Interface (QPI). Since then Jeffrey has been involved in several generations of Xeon products from design to post silicon validation. In 2012, Jeffrey was recognized as a tech lead in SDG, and continued to develop the cutting-edge high speed serial I/O modules for server products. Jeffrey holds a PhD degree in EECS from UC Berkeley and is a member of IEEE.
Most helpful customer reviews
1 of 1 people found the following review helpful.
Great book but not for the beginners!
By Ali
This book is certainly not written for beginners! I recommend reading other books from Bogatin or more advanced ones from Hall and Heck to start this field.
However, this books covers more practical aspects of high speed channel design. It doesn't go into the math very deep but if you are already familiar with the topic, you will enjoy reading the design hints.
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